1. Field of the Invention
Embodiments of the present invention relate to a semiconductor package apparatus and method of manufacture thereof, and more particularly, to a semiconductor package apparatus for improving electrical characteristics such as power and/or ground distribution, etc. and more stable control over impedance properties.
2. Description of the Related Art
In general, the development of semiconductor packages used in electronic products has been continuous and rapid in an effort to keep pace with the tendency toward miniaturization of the electronic products. Examples of such semiconductor packages include flip chip packages, wafer level packages, wafer level stack packages, and the like.
In particular, there has been widely used a 3-dimensional (3-D) stack technique of a chip stack package in which a plurality of semiconductor chips are stacked on a circuit board so as to enable high-capacity integration. It has been a challenge to control electrical characteristics between the semiconductor chips and signal lines formed on a circuit board, for example, controlling the impedance of a packaged device. As a result, power and/or ground characteristics are adversely affected and noise can be generated, and thus, reliability of the operation of the packaged device is lowered, resulting in higher likelihood of malfunction.